1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, particularly, a method of manufacturing a bipolar transistor which permits accurately forming a base region and an emitter region by self-alignment.
2. Description of the Related Art
High performance bipolar transistors having a high cut-off frequency, which can be integrated in an LSI, are required in various fields such as electronic computers, optical communication and various analog circuits. To achieve such a high performance, it is important to form the base and emitter regions by self-alignment. Several techniques for the self-alignment have already been proposed in, for example, the publications listed below:
(1) Japanese Patent Disclosure 54-155778 PA1 (2) IEEE Trans. on Electron Device, Vol. ED-33, April 1986, p. 525 PA1 (3) Japanese Patent Disclosure 58-7862 PA1 (4) IEDM' 86, 1986, p. 420 PA1 (5) Japanese Patent Disclosure 60-81862
These techniques have already enabled the bipolar transistor to have a cut-off frequency of about 30 GHz.
For example, FIGS. 1A to 1E collectively show the prior art described in Japanese Patent Disclosure 60-81862 noted above. Used in this prior art is a wafer prepared by forming an n.sup.+ type buried region 102 and a P-type channel stopper region 104 in a P-type silicon substrate 101, followed by forming an N-type epitaxial layer 103 on the entire surface. As shown in FIG. 1A, the wafer surface is selectively oxidized so as to form a thick field oxide film 105 surrounding the element region. Then, a thin thermal oxide film 106 is formed on the surface of the element region, followed by successively depositing a silicon nitride film 107 and a first poly-Si film 108. The undesired portion of the first poly-Si film, which is positioned above the field oxide film 105, is selectively oxidized to form an oxide film 109. Then, the remaining poly-Si film 108 is doped with boron by means of ion implantation, followed by applying a selective etching to the poly-Si film 108 to form an opening.
After the selective etching, a heat treatment is applied under an oxidative atmosphere to form a thermal oxide film 110 on the surface of the poly-Si film 108, as shown in FIG. 1B. Using the thermal oxide film 110 thus formed as an etching mask, the silicon nitride film 107 is selectively etched with a hot aqueous solution of phosphoric acid so as to expose the thermal oxide film 106. Then, the exposed thermal oxide film 106 is etched with an aqueous solution of NH.sub.4 F so as to expose the wafer surface in the element region. Incidentally, the silicon nitride film 107 is intentionally over-etched to form an overhanging portion 111, with the result that the wafer surface below the poly-Si film 108 is partly exposed.
In the next step, the free space in the overhanging portion is filled with a second poly-Si film 112, as shown in FIG. 1C. To form the second poly-Si film 112, a second poly-Si film is deposited by CVD on the entire surface under the conditions which permit the deposited poly-Si to fill the overhanging portion, followed by etching back the deposited poly-Si until the oxide film 109 and the wafer surface within the opening are exposed.
After formation of the second poly-Si film 112, the exposed surfaces of the element region and the second poly-Si film 112 are thermally oxidized to form an oxide film 113, as shown in FIG. 1D. During the heat treatment, the borons doped in advance in the first poly-Si film 108 are diffused into the second poly-Si film 112 and, then, into the epitaxial layer 103, with the result that a P-type outer base region 114 is formed within the element region. Subsequently, P-type inner base region 115 is formed by ion implantation of boron through the emitter opening.
Then, a CVD insulation film 116 and a third poly-Si film 117 are successively deposited, followed by etching back these films by reactive ion etching so as to leave laminated films 116 and 117 only on the side wall of the opening. Further, the thermal oxide film 113 within the opening portion is etched, with the third poly-Si film 117 used as a mask, so as to expose the wafer surface. After the exposure, a fourth poly-Si film 118 doped with a high concentration of arsenic is deposited, followed by heat treatment for diffusing the arsenic so as to form an N-type emitter region 119.
The fourth poly-Si film 118 is patterned in the shape of an electrode, as shown in FIG. 1D, followed by depositing an aluminum film 120 on the entire surface. Finally, the aluminum film 120 is patterned in the shape of an electrode, as shown in FIG. 1E, so as to manufacture a desired bipolar transistor. It should be noted that the first and second poly-Si films 108 and 112 are used as a part of the base electrode. Also, the fourth poly-Si film 118 is used as a part of the emitter electrode.
The prior art described above permits forming the base regions 114, 115 and the emitter region 119 by self-alignment. It is also possible to achieve a fine structure in which the emitter width can be diminished to as small as 0.35 .mu.m. However, serious problems remain unsolved in this prior art.
First of all, it is impossible to secure a sufficient thickness of the thermal oxide film 110. It should be noted that the oxide film 110 is used as an etching stopper in the step of etching the thermal oxide film 113 for forming the electrode wiring as well as in the steps of patterning the poly-Si film 118 and the aluminum film 120. What should also be noted is that the thickness of the thermal oxide film 110 is considerably reduced in the preceding etching steps, with the result that, in the step of forming the electrode wiring, the oxide film 110 does not have a thickness large enough to perform the function of an etching stopper. It follows that the thermal oxide film 110 tends to be removed in the etching step for forming the electrode wiring. In this case, the poly-Si film 108 positioned below the oxide film 110 is etched, leading to breakage of the base electrode.
Suppose the thermal oxide film 110 is formed thick in the step shown in FIG. 1B in an attempt to prevent the base electrode breakage. In this case, the thickness of the first poly-Si film 108 acting as the base electrode is reduced, leading to an increased base resistance. In order to increase the thickness of the thermal oxide film 110 while keeping the base resistance low, it is necessary to form the first poly-Si film 108 sufficiently thick in the step shown in FIG. 1A. If the first poly-Si film 108 is thickened, however, a long time is required for the uniform boron doping by ion implantation. It is very difficult to perform an ion implantation for such a long time by the ion implantation apparatus variable nowadays. It should also be noted that out-diffusion of boron from the first poly-Si film 108 is brought about by the heat treatment for forming the thermal oxide film 110. The reduction in the boron concentration in the first poly-Si film 108 thus caused leads to a further increase in the base resistance.
Another difficulty inherent in the prior art is that the thickness of the insulation film interposed between the poly-Si films 117, 118 forming the emitter electrode and the poly-Si film 108 forming the base electrode is reduced in the etching steps noted previously. As a result, current leakage and reduction in the withstand voltage tend to take place between the emitter and base regions. Particularly, stress is concentrated on the thermal oxide film positioned at the corner portions of the poly-Si films 108 and 112 forming the base electrode. Naturally, the etching rate in the corner portion of the thermal oxide film is higher than in the other portion. It follows that short-circuiting between the emitter and base regions tends to take place in the corner portion.
An additional difficulty to be noted is that the aluminum wiring 120 shown in FIG. 1E is formed after the step of patterning the fourth poly-Si film 118 acting as the emitter electrode. In other words, the aluminum film is formed on the underlying layer having sharp steps. It follows that the aluminum wiring 120 is likely to be broken easily.